Freescale Semiconductor /MKM33ZA5 /LCD /FDCR

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Interpret as FDCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)FDPINID0 (0)FDBPEN 0 (0)FDEN 0 (0)FDSWW0 (0)FDPRS

FDSWW=0, FDPINID=0, FDPRS=0, FDBPEN=0, FDEN=0

Description

LCD Fault Detect Control Register

Fields

FDPINID

Fault Detect Pin ID

0 (0): Fault detection for LCD_P0 pin.

1 (1): Fault detection for LCD_P1 pin.

FDBPEN

Fault Detect Back Plane Enable

0 (0): Type of the selected pin under fault detect test is front plane.

1 (1): Type of the selected pin under fault detect test is back plane.

FDEN

Fault Detect Enable

0 (0): Disable fault detection.

1 (1): Enable fault detection.

FDSWW

Fault Detect Sample Window Width

0 (0): Sample window width is 4 sample clock cycles.

1 (1): Sample window width is 8 sample clock cycles.

FDPRS

Fault Detect Clock Prescaler

0 (0): 1/1 bus clock.

1 (1): 1/2 bus clock.

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